The present invention relates to GPS/GNSS receivers. More specifically, the present invention relates to low-cost GPS/GNSS receivers having a small-sized memory.
There is an increasing demand for C/A code GPS receivers which are not only low in cost, but which provide superior performance in a wide variety of signal environments. Critical issues are better receiver acquisition sensitivity, a shorter time to first fix (TTFF), and the ability to track position and velocity more accurately, even with weak signals and substantial multipath. In this section, we discuss specific deficiencies in current low-cost receivers which are ameliorated by the present invention. The invention is described for a C/A code GPS receiver, but can also be incorporated in other Global Navigation Satellite System (GNSS) receivers.
Signal Bandwidth and Sampling Rate
In order to achieve a small TTFF, typical low-cost GPS receivers employ a capture memory, sometimes called a snapshot memory, which captures a digitized time segment of the received GPS signal. The signals can then be rapidly acquired by accessing this memory and searching for the signals in Doppler and delay at relatively high speed. However, this memory comprises a major portion of the receiver cost, and therefore needs to be as small as practical. For this reason, the signals emerging from a typical low-cost receiver front end (RF/IF section) have a relatively small bandwidth that can be sampled at a low rate, thus reducing snapshot memory size.
The IF (intermediate frequency) signal at the output of a typical low-cost receiver front end is real-valued (as opposed to complex-valued) with a center frequency of 4.092 MHz and a relatively narrow RF bandwidth of 2 MHz (±1 MHz) to conserve shapshot memory. Various sampling techniques are used to convert the IF output to a complex baseband signal. Sampling theory dictates that the minimum sampling rate for such a baseband signal is 2 MHz, in order to avoid detrimental spectral aliasing which would reduce signal-to-noise ratio (SNR).
Although they reduce receiver cost by reducing the size of snapshot memory, such typical design parameters, especially the narrow RF bandwidth, severely restrict the ultimate receiver performance that is possible with wider bandwidths. The benefits of a wider bandwidth are significantly improved positioning accuracy both with and without the presence of multipath, better tracking sensitivity, and more robust performance when the receiver is subject to accelerations.
It is also significant that the real-valued IF output signal in typical low-cost receivers limits the maximum RF bandwidth to twice the IF center frequency if spectral aliasing and reduced SNR are to be avoided. This limit is independent of the sampling rate used. In a few low-cost receivers a higher IF frequency is used to circumvent this limitation. However, the higher RF bandwidth that is achievable requires a higher sampling rate and larger snapshot memory size in conventional designs.
Choice of Reference Oscillator Frequency
Another performance limitation found in many low-cost receivers is caused by the use of a reference oscillator which is an integer multiple of the zero-Doppler PN (pseudonoise) code chipping rate of GPS signals (1.023 MHz). For example, a popular temperature compensated crystal oscillator (TCXO) frequency is 16.368 (16×1.023) MHz. This can cause a “beat” phenomenon between the sampling frequency and the PN code of a GPS signal which has near-zero Doppler. The effect is an oscillatory error in the PN code tracking loops, which degrades positioning accuracy.
Signal Code and Carrier Tracking
As the demand grows for better performance of low-cost GPS receivers in poor signal environments, there is a corresponding need for better performance of the delay-locked loops (DLL's) which track the GPS PN code, as well as the phase-locked loops (PLL's) and frequency-locked loops (FLL's) which track the carrier. Each satellite has it own PN code (a specific chip sequence unique to the satellite). Since the GPS L1 signal has exactly 1540 carrier cycles per C/A (Coarse/Acquisition) PN code chip, most receivers can count carrier cycles from the PLL to accurately establish the received chipping rate, including Doppler. This information is used to “rate aid” the DLL by very accurately controlling the chipping rate of the receiver-generated reference PN code for the specific satellite so that in the absence of any other DLL commands, the received and reference PN codes are stationary relative to each other. PN code correlators are used to form an error signal which is proportional to the delay difference between the received and reference codes, and this error signal is used to move the reference PN code into alignment with the received code. Rate aiding significantly reduces stress on the DLL, because the PLL can accurately track carrier cycles even during periods of receiver acceleration, thus accurately matching the received and reference PN code chipping rates.
However, PLL's cannot maintain lock when the received signal is less than approximately −149 dBm (generally regarded as a weak signal, but not as weak as a desired tracking goal of approximately −160 dBm). When PLL lock is lost, the counting of carrier cycles will tend to have very large errors, which can cause the rate-aided DLL to also lose lock. A typical solution to this problem is to switch from PLL to FLL operation when the signal falls below the PLL tracking threshold, and switch back from FLL to PLL operation if the signal rises above this threshold. FLL's have the advantage that they can track frequency at significantly smaller signal levels than a PLL, down to approximately −160 dBm, and also have a larger capture, or pull-in range. The FLL can also be used for rate aiding of the DLL, but will not do this as well as a PLL because it only tracks frequency, not phase. As a result, noise on the signal causes phase “cycle slips” which cause rate-aiding errors.
Unfortunately, switching back from FLL to PLL operation has a serious drawback. It might seem that the switch should occur when the signal rises to the PLL tracking threshold (approximately −149 dBm). However, at this signal level the pull-in range of the PLL (as small as a fraction of a Hertz) is usually smaller than the frequency tracking error of the FLL. The presence of receiver acceleration exacerbates the problem. In order to guarantee that the PLL can pull in, the threshold for switching back from FLL to PLL operation must be made significantly larger (perhaps −144 dBm or more) in conventional designs. This forces the FLL to operate in a region where the PLL would normally be able to track with better performance, assuming it had previously pulled in at a stronger signal level.
DLL Tracking Correlator Design
The standard method of DLL code tracking is to employ two correlators, called the early and the late correlators. The reference code for the early correlator is advanced in time and that of the late correlator is retarded by the same amount of time relative to the receiver generated code, called the punctual reference code. The difference in the magnitude of the correlator outputs forms an error signal which indicates the degree of misalignment of the received and punctual reference codes. The error signal passes through a filter whose output is used to shift the phase of the punctual reference code in a direction which drives the error signal to zero.
In most early GPS receivers the early and late reference codes were respectively advanced and retarded by ½ C/A code chip, resulting in an early-late spacing of 1 chip. However, circa 1994 it became widely known that a smaller spacing combined with a higher receiver bandwidth would significantly reduce pseudoranging error due to thermal noise. It was shown that with smaller spacing (a “narrow correlator”) the noise from the early and late correlators becomes statistically more correlated, and thus tends to cancel in forming the error signal. An additional benefit is that multipath mitigation is also improved. With this knowledge, narrow correlator receivers with an early-late spacing of 0.1 chip or less soon began to appear, but not in low-cost consumer grade receivers.
However, the accuracy and multipath performance advantages of narrow correlators cannot be gained unless the signal has a bandwidth significantly wider than that found in typical low-cost receivers. Consequently, increasing the bandwidth in a typical low-cost receiver design requires a higher sampling rate and the increased cost of more snapshot memory.
Multipath Mitigation
Until recently, the positioning accuracy of low-cost GPS receivers has not been good enough to be seriously impaired by errors due to multipath. Therefore, in many of these receivers no attempt has been made to include receiver-based multipath mitigation techniques. But that situation is changing. Now there is an increasing demand for better positioning accuracy, even in urban canyons where multipath can be severe.
In order to achieve effective multipath mitigation, the receiver bandwidth must be much wider than in today's typical low-cost GPS receivers. Again this conflicts with the need to keep the bandwith low for cost reduction in such units.